High-power systems require parallel IGBTs to handle loads of tens to hundreds of kilowatts. These parallel devices can be either discrete packaged components or bare chips assembled into modules. This configuration allows for higher rated currents, improved heat dissipation, and sometimes system redundancy. Variations in the manufacturing processes and layout of the components can affect the static and dynamic current distribution of the parallel devices. System design engineers must understand these factors to ensure the reliability of the system.

In the application of parallel IGBTs, the primary consideration is to balance the losses. If these losses are not evenly distributed, the thermal differences between devices can lead to issues, potentially causing transistor failures. Imbalance can arise from two sources: internal imbalance within the IGBT, which can be addressed by selecting appropriate components, and external imbalance, which can be mitigated through well-designed system architecture.

1. Static changes

From the static perspective of IGBTs, two parameters are particularly important. These are the changes in VCE (SAT) during first-quadrant operation and the variation in transconductance (see Figures 2 and 3). VCE (SAT) is a critical parameter that controls the on-state loss of IGBTs, which significantly impacts overall losses and device heat dissipation. VCE (SAT) is typically provided at 25°C and the rated junction temperature, though it can also be given at other temperatures.

Generally, typical values and maximum values are provided at 25°C, while only typical values are provided at other temperatures. Transconductance varies with different devices. This parameter is defined as the change in collector current when the gate voltage changes. It is not a constant, and the data sheet usually provides a typical curve. As shown in Figure 1, this parameter varies with temperature. The change in transconductance is equivalent to the change in VCE (SAT).

Figure 1. Typical IGBT with transmission characteristics VGE = 20

The VCE (SAT) of IGBTs is a key parameter for calculating static variations, directly impacting the transistor's conduction loss. The transconductance is typically specified as a typical value and does not vary with different devices. The VCE (SAT) is usually a value within a specific temperature range and can differ among devices. Most manufacturers provide typical and maximum values at 25°C; however, onsemi provides minimum and maximum values for IGBTs used in parallel applications. While the minimum VCE (SAT) value is not critical for individual devices, it is very useful in parallel applications, allowing for detailed analysis of this loss based on specific application scenarios.

It is worth noting that, although the temperature coefficient has not been discussed, non-epitaxial IGBTs have a positive temperature coefficient. When temperature imbalance occurs due to the lower saturation voltage of IGBTs, the difference in VCE (SAT) will be minimized. Another static variation is the forward voltage drop of the antiparallel rectifier. In most hard switching applications, the diode is necessary to conduct the third quadrant current.

Figure 2. First quadrant conduction of IGBT

Figure 3. The third quadrant conduction of the diode

Anti-parallel diodes are typically packaged together with IGBTs, but they can also be packaged separately in certain cases. If the IGBT is a co-packaged device, the data sheet will provide the forward characteristics of the diode. The data may vary depending on the device. Typically, typical values and maximum values are provided in the electrical characteristics section, while a set of curves showing temperature variations is presented in the typical characteristics section.

2. Dynamic changes

The dynamic components of loss include on-state loss, off-state loss, and diode reverse recovery loss. The gate drive circuit can control on-state and off-state losses to some extent. Both the gate voltage and drive impedance are system parameters that can be adjusted to reduce these losses. The collector rise time typically ranges from 10 to 50 nanoseconds, while the fall time is usually 3 to 8 times slower than the rise time. These rise and fall times are influenced by the gate drive level and impedance, so it is crucial to ensure consistent drive signals across all devices in parallel applications to minimize differences in switching speeds.

To match the switching speeds of parallel devices as closely as possible, proper layout techniques are essential. The layout should be as symmetrical as possible to minimize parasitic inductance. It is also important to minimize the impedance and impedance mismatch between the emitter and ground. If a current sensing transformer is used, it should be connected to the collector path.

When using a current sensing resistor, it is typically connected to the emitter path, provided it is an inductive resistor and the layout is balanced, which will not cause issues. Proper layout also requires that the thermal paths of each device be as matched as possible, for example, avoiding placing one device at the edge of the heat sink and another at its center, and positioning them symmetrically on the heat sink. Changes in dynamic losses come from multiple factors. There are inherent differences in switching speeds between chips and between wafers. Additionally, variations in transconductance can lead to differences in rise and fall times. This can also be considered as a difference in Vth, with the gate voltage located on one axis of the transconductance curve. In addition to the changes in emitter inductance discussed earlier, any change in gate inductance and resistance will result in an imbalance in the gate signal.

3. Thermal coefficient

The thermal coefficient is a critical parameter when paralleling IGBTs. It must be a positive coefficient to ensure current balance, as illustrated in the region above the isothermal point in Figure 1. A higher positive thermal coefficient can achieve more balanced currents but also increases losses at high currents, as VCE (SAT) rises with temperature. A negative thermal coefficient is unsafe. If one device in the parallel configuration is hotter than the others, its conductivity increases, leading to higher currents and temperatures, creating a cycle. The best scenario is a significant thermal imbalance, while the worst is potential device failure.

The specific transconductance curve is determined by the selected device; the temperature coefficient can be adjusted by modifying the gate drive voltage, moving the operating point closer or farther from the isothermal point. Adjusting the gate drive voltage also affects VCE (SAT) and switching speed. A higher temperature coefficient improves current balance during conduction but increases power loss at high power levels. A positive temperature coefficient is essential for safe parallel operation. The transconductance (or transfer characteristic) curve in the data sheet provides information on changes in collector current under a given gate drive signal. Figure 4 shows the transconductance curve of an IGBT.

Figure 4. Temperature coefficient from the transconductance curve

Figure 5 can be drawn by determining the current at gate voltages of 9V, 9.8V, 11V and 12V in graphical form. 9.8 V is chosen because it is the isothermal point with zero temperature coefficient.

Figure 5. IGBT collector current temperature coefficient

The impedance or VCE (SAT) parameter requires a positive temperature coefficient. The current change curve shown above indicates that this parameter needs a negative coefficient. This negative temperature coefficient means that, when the collector-emitter voltage is set, the current decreases as the temperature rises, which is essential for achieving good current balance. As shown in Figure 5, when the gate drive voltage exceeds 9.8 V, the slope of the current temperature coefficient increases with the increase in gate voltage, thus improving current balance.

Another way to examine the temperature coefficient is by plotting the relationship between the collector-emitter voltage and temperature at a fixed gate voltage. IGBT data sheets typically include curves showing the collector current and collector-emitter voltage at various gate drive voltages under extreme conditions, such as high temperatures, room temperatures, and low temperatures.

Figure 6. Output characteristics of IGBT

Figure 6 shows one of the curves for IGBTs, with a temperature of 25°C. Using the data from these three curves, a graph can be created showing the variation of VCE (SAT) with temperature at different gate voltages (Figure 7). This graph illustrates the positive temperature coefficient when the gate drive voltage exceeds 9.8 V, and the slope increases as the gate voltage rises.

Figure 7. Temperature coefficient of VCE for IGBT

From this simplified analysis, it can be seen that it is important to keep the gate drive voltage much higher than the isothermal point. The higher the gate voltage, the more uniform the current distribution.

(SHY Semi's IGBT Modules Production Process)

Video Source: Shenhuaying Semiconductor